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[求才「理工」] Senior Design Verification Engineer

[複製連結]
dial5957 發表於 2011-10-26 18:32:20 | 顯示全部樓層 |閱讀模式
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    公司名稱: Sandisk

  • 職稱: Senior Design Verification Engineer
  • 工作性質: 全職 (Full time) 
  • 工作地點: Milpitas, CA
  • 專業: SystemVerilog testbench
  • 是否應屆: 非應屆
  • 年齡要求: none
  • 性別要求: 男 女 
  • 薪資: 面議
  • 提供H-1或綠卡: 提供H-1 提供綠卡 
  • 聯絡方式: sandisk.jobs@gmail.com
Job Title
Senior Design Verification Engineer

Job Description
In this position, the individual will participate in the logic design and verification of NAND Flash memory products. Main responsibilities include:
-       Development of SystemVerilog TestBench for NAND Flash chips
-       Full-chip verification on Flash memory projects with SVTB.

Other responsibilities include:
-       Support of SystemVerilog Assertion
-       Behavioral modeling in SystemC and C++
-       Support of design and verification methodology enhancements.

This position requires an MS degree or equivalent with 5 or more years of experience in logic design and verification. This position also requires experience of SystemVerilog TestBench development and full-chip verification using SVTB.

Job Location
Milpitas, CA

SanDisk Corporation
SanDisk is the world's largest supplier of innovative flash memory data storage products and we offers a highly competitive compensation package and great benefits, which include Stock Options, ESPP, matched 401 (K), comprehensive insurance and tuition reimbursement. SanDisk is an equal opportunity employer.
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